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DAC noise on SDCARD reads - SOLVED

Barry Richards
Associate II
Posted on September 03, 2017 at 23:44

I have a custom board (2 layer) using a STM32F446RETx (3.3v) with STM32CubeMX, V4.22 with firmware V1.16.0.  I am reading/processing MP3 files from a sdcard and there is a low-level but perceptible 'thump' in the audio when the card is read.  I can change the noise interval by changing the size of the fatfs read buffer. Also see waveform, top trace is SDIO D0 and bottom trace is DAC1

0690X000006086LQAQ.png

processor speed is 120MHz

SDIO clk 48MHz

SDCARD 4-bit with DMA and a lower priority than DAC

Allowing SDCARD reads but forcing DAC output to a set level (2047) the 'thump' is still heard when the card read takes place. (sounds rather like listening to a heartbeat in a stethoscope).

Changing the DAC from 12 bit to 8 bit had no effect.

Enabling or disabling the DAC output buffer has no effect.

Changing slew rate on the GPIO pins has no effect.

Changing SDIOCLK divisor has no effect.

Using 3 different sdcards has no effect.

I re-did the board, moving the SDCARD slot away from the CPU and added a 33uF cap across SDCARD pwr supply.

SDCARD slot is not under or in close proximity to the MCU and SD traces are not in parallel or close to the DAC traces.

The sound quality of the DAC output is fine except for the noise when the card is read.

I thought this would not be a problem since the card and dac are on separate DMA controllers.

Should I give up on using the internal DACs and go with a I2S external DAC?

Thanks for any suggestions.

11 REPLIES 11
Posted on September 04, 2017 at 04:01

Managing current flows and power on 2-layer boards is always a nightmare.

Perhaps focus on the bulk and decoupling capacitors on the digital supplies, and what's happening with the VCAP pins.

Perhaps looks at a choke/inductor on the VDDA/VREF+

Other might have a better idea if noise on the die can be reliably kept from the DAC/ADC side of things.

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Posted on September 04, 2017 at 17:13

Thank you for the suggestions Clive1.

I did manage to get a small inductor soldered between V+ and the 1uF cap on VDDA.  I also tried changing the 1uF cap to 10uF but in both cases, there was no detectable difference.

Unless someone can say the DAC and SD paths inside the mcu should not interfere with concurrent activity, I think I will try a external DAC next, then failing that, go with the 4-layer board.

Posted on September 04, 2017 at 17:26

Take a similar scan with the scope than the first one, except that now with VDDA instead of DAC output at channel 2.

JW

Posted on September 04, 2017 at 18:25

Scan with top trace=SDIO D0 and bottom trace=VDDA (at the moment there is a 100nF and a 10uF cap across VDDA).

0690X000006087EQAQ.png
Posted on September 04, 2017 at 20:40

DAC is only an 'adjustable divider from VDDA'. So make VDDA clean and you're done.

Note that GND is part of the circuit, and that there's nothing like zero resistance track.

JW

Posted on September 04, 2017 at 19:44

Also trace of VCAP1.

0690X000006087TQAQ.png
Posted on September 05, 2017 at 03:09

It seems making VDDA clean can't be done with capacitors or inductors.

I think I see a 4-layer board in my future.

Thanks for all the suggestions.

Posted on September 05, 2017 at 08:59

While harder, it's still perfectly possible to achieve the same level of noise on a multilayer board if you don't know what are you doing.

Start with your current board. Cut GND and VCC just next to SDCard. Run two wires to it directly from the regulator. Measure (and be sure you place the ground clip and probe tip to the very same spots as previously). Any change?

JW

Posted on September 06, 2017 at 02:20

I did as you suggested, cut the GND and VCC connections to the SDCARD and ran wires to the regulator.  Unfortunately, the noise is same or more so with the board in this state.  The SDCARD still has a full ground plane under it so it may still be inducing something there.  I will say it seems odd the scope trace from before shows the noise as being high in frequency but what I hear is actually fairly low but I suppose some kind of aliasing could explain that. 

I may try one more 2-layer board but remove the ground plane from under the card and run separate traces back as I did with the wires.  At least I now feel confident this is not a problem with concurrent DMA activity.

Thank you.