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SWD debug failure in High voltage situation

xie ningmeng
Associate
Posted on May 06, 2017 at 05:12

Hi,

    I am using the chip STM32F405

when developing a power converter. It is a buck converter. 

    When the input voltage is below 25V, I used the keil to debug the chip normally, and monitor the variables.

However, when the voltage is up to 40V or even more, I cannot debug any more.

0690X00000606wtQAA.png

The following is the SWD interface I designed

0690X00000606rvQAA.png

Debug hardware: STM32F0discovery working as stlink debuger

Debug target: STM32F405RGT

Debug interface: SWD

The power of the MCU is provided by standalone DC source of 3.3V.

The input voltage of the buck converter is provided by another DC source.

So, why I cannot debug the target when the input voltage is high? Is there any things I should paid attention to when designing the debug circuit in such high voltage application?

#swd #debug
2 REPLIES 2
S.Ma
Principal
Posted on May 06, 2017 at 12:07

Higher dynamic voltage may create higher slew rates and more radiation (EMI).

EMI comes from inductance caused by current loops, in this case from any signal pin to ground through PCB traces.

To check and reduce coupling between high freq signals and debug signals, make sure that the PCB traces of SWD never runs parallel to radiating dynamic HV lines. (Howard Johnson has good books about this topic)

If needed shield the cable between the board and the PC, otherwise, maybe use twisted pairs signal-ground.

Use a scope and look for glitches... 

Jeroen3
Senior
Posted on May 06, 2017 at 15:07

Make sure there is no current or common mode noise leaking through the USB cable. It messes up the signalling of SWD.

If there is, use an USB isolator, or an ST-LINK/V2-ISOL.