STM32F10X : Is it possible to sent a 9 bits SPI frame ?

[Alexandre Boyadjian]

Posted on May 22, 2017 at 12:04

Hello

I'm using a Nucleoboard with a STM32f103RB chip. I would like for a project to communicate with SPI protocol by sending frame of 9 bits. I've seen in the datasheet that I can configure the SPI datasize that way : 

SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;

or 

SPI_InitStructure.SPI_DataSize = SPI_DataSize_16b;

But I would like to know if it's possible to use others size of frame (9,10,11.. bits).

Thank you for your help.

[waclawek.jan]

Posted on May 22, 2017 at 14:06

Not in 'F1xx (nor 'F2/'F4).

Newer STM32 families have more options in SPI frame size.

JW

[Alexandre Boyadjian]

Posted on May 22, 2017 at 14:12

Then it is not even possible to send just one bit ? We have to send atleast 8 bits or 16 bits in SPI mode ? Or add a default bit (0 for exemple) with a extra clock at the end of each frame sent ?

Thank you for your reply.

[waclawek.jan]

Posted on May 22, 2017 at 15:45

You can always 'manually' bit-bang whatever number of bits you want.

If the frames are to be consecutive, say 10x9 bits, that's 90, you can then send them as 11 8-bit frames then 2 manually bit-banged bits. The bytes-to-be-transmitted have to be modified accordingly, of course.

JW

[Elkin Granados]

Posted on May 22, 2017 at 18:30

Hi Alexandre,

As

Waclawek.Jan

replied, this family of micros don't have the feature of select any other frame size as you can check in the reference manual:

I faced the same issue trying to transmit a 25bit frame, So as

Waclawek.Jan

recommended to you, you should implement a manually spi. I suggest to use a timer configured in with a period equal to the half of the frequency period and use the timer overflows, configure 3 pins as GPIO output for clock, mosi and nss and make the following:

It works for me.

[Tesla DeLorean]

Posted on May 22, 2017 at 22:48

Or for that matter 8x 9-bits, vs 9x 8-bits...

Might frankly be better picking a new part rather than a decade old one with poor thinking/planning inside. Though I still think the chip select logic is brain damaged...