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There is a 5.6V peak on the rising edge using STM32F103 TIM1 PWM output pin

Wang Sky
Associate II
Posted on June 15, 2017 at 08:18

Hi everybody!Recently I found a strange phenomenon that there was a peak on the rising edge when I using the TIM1's 4 chanels to be PWM output mode.And the maxium peak voltage can reach to 5.6V measured by the oscilloscope.But the maxium voltage supplied for the MCU was just 3.45V measured by the same oscilloscope.

So where was the 5.6V peak voltage from?Please help me!

Environment:

1.MCU model:STM32F103VET6

2.Core clock:72MHZ

3.Used TIMER:TIM1

4.Timer Mode:PWM output mode

5.PWM frequency:100Hz

6.Duty cycle:50%

7.PWM driver load:No load

8.PWM output pin configuration:GPIO_Output_AF_PP

0690X00000603nLQAQ.jpg

#stm32-pwm
8 REPLIES 8
Posted on June 15, 2017 at 10:29

Inductive load?

JW

Posted on June 15, 2017 at 12:06

Or another artifact, related to scope / probe impedance.

Otherwise, it would be persistent (with every rising edge).

Does it disappear when you zoom in (record with higher sampling rate) ?

Posted on June 15, 2017 at 12:27

Thank you for replying.I have tried zoom in or changing the probe impedance but the peak always exited.And I measured 3 different board with differrent cicurt,the phonomenon exits always.

Posted on June 15, 2017 at 12:29

I measured the wave when the PWM pin was not connected to any load.

Zt Liu
Senior III
Posted on June 15, 2017 at 15:17

You may check the voltage by a DMM first, is it 2.8V (suppose really 5.6V square wave).

I had been fooled by xx-Instek oscilloscope's certain malfunctioning channel.

John F.
Senior
Posted on June 15, 2017 at 16:50

Are you certain you are making a 'single ended' measurement with a common 0V between your circuit and the oscilloscope?

Posted on June 15, 2017 at 15:05

Is there >3.3V on any other pin of the mcu?

JW

Posted on June 15, 2017 at 17:59

Select less aggressive slew rate (IO Speed), ie use the 1 or 2 MHz settings, not the 50 or 100 MHz ones

Poor grounding, pretty sure it's not coming from the STM32F1 inherently. Plot the VDD vs VSS on the second channel of the scope.

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