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Supply decoupling capacitors for BGA/WLCSP packages

Oliver 2017
Associate
Posted on May 15, 2018 at 16:44

I am designing a board with an STM32L443 MCU in a UFBGA64 package. There is a design requirement for components only on one side.

As with any MCU I plan to decouple the power supply pins using 100nF capacitors as close as possible to the power pins. However, with the setup as described above this would consist of a via from the power pin to the VDD plane, a via from the ground pin to the GND plane, then the 100nF cap directly next to the chip with vias to the same layers. This results in a larger path length which is undesirable.

AN4555 (Hardware development guide - section 6.5) only recommends as close as possible, or on the underside of the board. Given I cannot put components on the underside of the board, should I still place five (the number of supply pins) decoupling capacitors as close as possible to the chip, or would fewer caps achieve the same effect?

The system has the CPU running at 2MHz, and SPI @ 2MBit/s to an S2-LP 868MHz Tx/Rx. I think I might be over-worrying about the impact, but I would value any input or suggestions.

Thanks

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