How to synchronize DAC, ADC together?

[C S]

Posted on October 31, 2017 at 07:13

I am using stm32L476 discovery board. I am trying to generate triangular wave with DAC. I am using two lookup tables for the DAC(1 for each up slope and down slope). I am giving sine wave at ADC input and I am getting some samples in triangular wave up slope time and down slope time. I start ADC and DAC together for up slope as well as down slope. I am calculating FFT of ADC samples. FOr up slope data, I start calculating FFT at down slope DAC conversion start and for down slope ADC samples FFT, I start calculating FFT after down slope DAC conversion completion. I have put all the necessary to ensure proper start and end timings of the processes of DAC, ADC and FFT. The problem is when I am running DAC at high speed(about 500 KSPS), the waveform appears for some seconds and afterwards the output becomes flat. The output waveform becomes flat on the peak side of wave. When I decrease the DAC speed to around 400 KSPS, the problem does not occur. Also, when I use HAL delay after the down slope FFT completion, the issue is resolved and the wave appears properly for all the DAC speeds. But I don't want to waste any time there. Below is the code. Anyone knows what the issue is here?

The code is attached. Please find the attachment.

#stm32 #dac #dma-adc #synchronization #triangular-wave

[S.Ma]

Posted on October 31, 2017 at 10:53

The source code is single line, too hard to look at it.

Did this on my side few years back with STM32F437, DAC generating waveform, triggered from sample clock coming from timer. Then use short pulses to dynamically inject the analog signal to an op-amp with analog switches, then go to ADC for sampling with trigger signal skewed from the DAC trigger clock signal.

Use DMA for the ADC and DAC. To start simple, use a single table (they can be put one next to the other in the memory space). Use a TIMER to generate the DAC trigger signal (use a real GPIO timer output, feed the DAC trigger pin). You can use other timer channels to generate the ADC trigger sampling point precisely.

If putting later on some analog filter between the DAC and ADC, better have a SW implementation sending several wave periods (DMA cycling DAC buffer) then stop. At this point, you can read the ADC buffer and perform the FFT. If you don't want to stop the DAC, just reroute the ADC writing DAC to a trash SRAM area.

[C S]

Posted on November 01, 2017 at 06:56

I have attached my code file.