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STM32H7 maximum sdram frequency

HAN Wu
Associate
Posted on September 05, 2017 at 10:37

The STM32H7 series drive SDRAM by fmc,

Which is maximum sdram frequency 100Mhz or 200Mhz can run?

0690X000006087sQAA.png

There are four input clock sources for fmc_ker_ck, and SDRAM clock can be fmc_ker_ck/2 or fmc_ker_ck/3.

If I choose clock source ''pll1_q_ck'' (max=400Mhz), then 

SDRAM can run -5 (200Mhz)?

Or it only can choose ''bus_clocks'' (max=200Mhz), then 

SDRAM run -10 (100Mhz)?

#sdram #stm32h7 #200mhz
1 REPLY 1
Cedric LECOUTRE
ST Employee
Posted on September 05, 2017 at 17:45

Hi

f9871006

‌,

Maximum SDRAM frequency is 100 MHz.

In the table you show from STM32H7 Reference Manual

http://www.st.com/resource/en/reference_manual/dm00314pdf

, section 8.5.8 p. 313 table 51 , you have the constraint that the FMC kernel clock can not be above 200 MHz.

So even if you put the system at maximum performance and generate a pll1_q_ck at 400 MHz (for clocking the CPU for instance), you can not use it for FMC peripheral. For example you will use HCLK3 which will be configured at 200 MHz: you can use

http://www.st.com/en/development-tools/stm32cubemx.html

and just select the STM32H743 with only the FMC activated to look at such clock tree in this simple case - see Clock configuration pane.

Then about the FMC peripheral, in

http://www.st.com/resource/en/datasheet/stm32h743bi.pdf

STM32H743 datasheet section 3.15 p.28, you will find the reminder that 'The maximum FMC_CLK/FMC_SDCLK frequency for synchronous accesses is the FMC kernel clock divided by 2' (SDCLK being the clock for external SDRAM).

Best regards,

Cedric