Poly-phase PWM

[Mario Simunic]

Posted on February 11, 2018 at 12:36

I'm need to generate N channel (N>1) PWM output in a such a way that one channel is main 'governor' lets say ch0. Every other channel repeats the same duty, but with time shift (or or phase shift).

Ch1 need to set pulse ch0_duty after ch0 set the pulse. Ch2 need to set pulse ch0_duty after ch1 set the pulse (or 2*ch0_duty after ch0 set pulse). Special case would be to generate symmetrical three-phase signal if duty=50% and N=3. Constraints are: duty <= 50%*2/N; N*Ton=T.Iv'e attached drawing to be more clarifying.

Is there any STM32 microcontroller which can generate such kind of signals using only PWM/timer/counter module, without ISR? Or maybe some kind of other integrated circuit which can generate such PWM signals?

Please advice.#phase-shift #pwm

[henry.dick]

Posted on February 11, 2018 at 13:08

for N < a threshold number:

   with software, anything is possible.

   with hardware, and 50% duty cycle, it is doable.

   with hardware, non-50% duty cycle, doable with one-pulse mode, but you will need software help -> performance limitations.

   you may check out LM3S/TM4C chips for that kind of functionality.

for N > that threshold number:

  not possible.

[S.Ma]

Posted on February 11, 2018 at 19:17

Brute force: Use 3 timers (Timer A,B,C) TA ==> TB, TC

Timer A generate output on CH1 (TA.1)

TB.1 = TA.1 (external wire jumper for debug)

TB.2 = PWM2

TC.1 = TA.1 (external wire jumper for debug)

TC.2 = PWM3

This would be one way to use flexible HW configuration to get the job done.

After implementing, maybe there are other ways to do it better.

When the whole application is not known, answers may not be the best one.

[waclawek.jan]

Posted on February 11, 2018 at 22:40

I don't quite understand the requirement exactly either, but there is no need for external wire jumpers since timers are linked internally.

The master would output TRGO upon update i.e. when its period starts (TIMx_CR2 = 0b010).

The slave timers may be set to trigger upon TRGI (TIMx_SMCR.SMS=0b110) and run in one-pulse mode, having set its ARR as the sum of delay and pulse and the appropriate CCR to start the pulse as required. 

JW