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STM32F0 TIM17 prescale settings has no effect on update interrupt

Kurt Alber
Associate III
Posted on February 21, 2018 at 10:02

I generated my code from STM32CubeMx and wanted to generate a update event every 1µs. I work with the internal clock at 48MHz, which should be with Prescaler:0 and Autoreload:47 result to 1µs.

I use a STM32F030 with TrueStudio V.9.0.0

**generated code**

/* TIM17 init function */

    static void MX_TIM17_Init(void)

    {

      LL_TIM_InitTypeDef TIM_InitStruct;

      /* Peripheral clock enable */

      LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_TIM17);

      /* TIM17 interrupt Init */

      NVIC_SetPriority(TIM17_IRQn, 3);

      NVIC_EnableIRQ(TIM17_IRQn);

      TIM_InitStruct.Prescaler = 0;

      TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;

      TIM_InitStruct.Autoreload = 47;

      TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1;

      TIM_InitStruct.RepetitionCounter = 0;

      LL_TIM_Init(TIM17, &TIM_InitStruct);

      LL_TIM_EnableARRPreload(TIM17);

    }

I added in my init:

 

LL_TIM_EnableIT_UPDATE(TIM17);

    LL_TIM_EnableCounter(TIM17);

In the IRQ_Handler i toggle a PIN:

void TIM17_IRQHandler(void)

    {

      /* USER CODE BEGIN TIM17_IRQn 0 */

        LL_GPIO_TogglePin(LED_D2_2_GPIO_Port,LED_D2_2_Pin);

      /* USER CODE END TIM17_IRQn 0 */

      /* USER CODE BEGIN TIM17_IRQn 1 */

      /* USER CODE END TIM17_IRQn 1 */

    }

After flashing my device with the code it generates a Signal with Frequency 889kHz with Pulsewidth of 564ns measured with Oscilloscope. Changes on Prescaler or Autoreload does not affect this output, it stays right away at T_Pulse=564ns or F=889kHz.

Any idea what I am missing here?

Register output from debugging:

    CR1:0x81              CR2:0

    DIER:0x01             SR:0x03

    CCMR1_O/I:0        CCER:0

    PSC:0                    ARR:0x2f

    RCR:0                   CCR1:0

    BDTR:0                 DCR:0    

    DMAR:0x81
1 ACCEPTED SOLUTION

Accepted Solutions
Kurt Alber
Associate III
Posted on February 22, 2018 at 08:46

The solution was the clearance of the FLAG UIE in TIM17->SR. I was stuck permanently in the IRQ routine.

View solution in original post

8 REPLIES 8
Posted on February 21, 2018 at 13:02

Well 0x2F == 47, so you'd likely want to look at why you aren't changing PSC or ARR with whatever interaction you are having with them.

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Posted on February 21, 2018 at 13:23

Sorry I do not  understand your suggestion. I have no further interactions with ARR and PSC except the posted code.

Hopefully this explains it further:

I have two issues:

1st:

  ARR=0x2f with PSC=0 with 48MHz Clock should give me 1µs ticks, but it doesn't, instead I get 564ns ticks.

2nd:

 When I enter different settings to ARR and PSC it does not change a bit, it remains at 564ns ticks.
Posted on February 21, 2018 at 14:07

Ok, yes at 48 MHz I'd expect a clean 1 MHz 

Problem likely that you can't interrupt at that rate,you'd want the TIM in PWM or TOGGLE mode to output a signal directly on a TIMx_CHx pin.

You're observing the processor saturate with the task given it.

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Posted on February 21, 2018 at 14:08

At 48 MHz with one wait state on the FLASH, the system performance is a lot closer to 27 MHz than it is 48 MHz

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Posted on February 21, 2018 at 14:25

If that should be the case, the signal should behave like expected by increasing PSC. I made such a test with PSC=48000 and still get ticks with 564ns.

Posted on February 21, 2018 at 14:55

Going to need to sanity check by printing APB clocks to console.

Output internal clock via PA8 (MCO), confirm with scope.

Program TIM17 CH1/CH2, or another TIM, so that pins are in PWM and TOGGLE mode, and see the TIM physically control the pins without the interrupt.

Make sure chip in being flashed with new builds of software.

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Kurt Alber
Associate III
Posted on February 21, 2018 at 16:43

Thank you!

I have a configured PWM Timer on TIM3 which is successful working with 4MHz output. Therefore I assume the system clock is at 48MHz because it works as designed;

But, If I enable UIE on TIM17:

LL_TIM_EnableIT_UPDATE(TIM17);

my 4MHz output on TIM3 (CH4) stops working too.

Kurt Alber
Associate III
Posted on February 22, 2018 at 08:46

The solution was the clearance of the FLAG UIE in TIM17->SR. I was stuck permanently in the IRQ routine.