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STM32F767: enabling ART Accelerator causes data loss on FMC bus

Max Rest
Associate II

Posted on February 14, 2018 at 20:34

Hi all,

I am using an STM32F767ZIT6 on our own development board with an 8080-style OLED on the FMC bus.

Flash is used over TCM bus, memory layout here:

MEMORY

{

/* Instruction locations */

RAMITCM (xrw) : ORIGIN = 0x00000000, LENGTH = 16K

FLASHTCM (rx) : ORIGIN = 0x00200000, LENGTH = 2048K

/* Data locations */

DTCM_RAM_RW_ZI (rw) : ORIGIN = 0x20000000, LENGTH = 16K

SRAM1_RW_ZI (rw) : ORIGIN = 0x20020000, LENGTH = 368K

SRAM2_RW_ZI (rw) : ORIGIN = 0x2007C000, LENGTH = 16K

/* Stack/Heap locations */

DTCM_RAM_STACK : ORIGIN = 0x20004000, LENGTH = 16K

DTCM_RAM_HEAP : ORIGIN = 0x20008000, LENGTH = 96K

}

I write data to the interface after HAL initialization like this:

HAL_SRAM_WriteOperation_Enable( &hsram1 );

for(char i=0;i<128;i++) //clear all columns

{

   if (HAL_SRAM_Write_8b(&hsram1, (uint32_t*)SSD1327_COMMAND, &Command, 1) != HAL_OK)

   {

      _Error_Handler(__FILE__, __LINE__);

   }

}

Everything works fine as long as I keep the ART accelerator disabled. As soon as I enable ART at startup, only 60% of the data is arriving, as verified with a logic analyzer.

What do I miss here, where should i start looking?

Best,

Max

--

EDIT: 

might be related to this unresolved issue here: 

1 ACCEPTED SOLUTION

Accepted Solutions
Max Rest
Associate II
Posted on February 17, 2018 at 12:41

The answer is in the MPU configuration. The respective memory region for the FMC mapped OLED Display needs to be configured 'STRONGLY ORDERED':

MPU_InitStruct.Enable = MPU_REGION_ENABLE;

MPU_InitStruct.Number = MPU_REGION_NUMBER4;

MPU_InitStruct.BaseAddress = 0x60000000;

MPU_InitStruct.Size = MPU_REGION_SIZE_16KB;

MPU_InitStruct.SubRegionDisable = 0x0;

MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;

MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;

MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE;

MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE;

MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE;

MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;

View solution in original post

1 REPLY 1
Max Rest
Associate II
Posted on February 17, 2018 at 12:41

The answer is in the MPU configuration. The respective memory region for the FMC mapped OLED Display needs to be configured 'STRONGLY ORDERED':

MPU_InitStruct.Enable = MPU_REGION_ENABLE;

MPU_InitStruct.Number = MPU_REGION_NUMBER4;

MPU_InitStruct.BaseAddress = 0x60000000;

MPU_InitStruct.Size = MPU_REGION_SIZE_16KB;

MPU_InitStruct.SubRegionDisable = 0x0;

MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;

MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;

MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE;

MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE;

MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE;

MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;