How to find global interrupt state of STM32 MCU?

[harry anders]

Posted on May 13, 2018 at 11:22

Hi,

I'm working on a fairly complex code written by other employees at our company where interrupts are globally disabled and enabled in multiple places using:

__enable_irq();

and

__disable_irq();

Sometimes it is not clear whether interrupts are currently enabled or disabled and I need to know the status of the global interrupt flag. How can I find the status and is it stored in a register that is accessible from user code or the HAL libraries?

I am working on 2 MCUs:

STM32f429 and STM32f777

Best regards

[AVI-crak]

Posted on May 13, 2018 at 12:17

Run away from this company, and do not look back.

The program code in which global interrupts are prohibited is one huge crutch. This means that at the very beginning they could not read the documentation, and later could not stop.

On the issue of how to determine:

If your code is executed, then interrupts are prohibited. Otherwise, an interrupt will occur, in which there are already two or three missed goals.

[waclawek.jan · Accepted solution]

Posted on May 13, 2018 at 12:18

__get_PRIMASK()

The global interrupt flag is bit 0 of PRIMASK (which is a register of the processor).

Read PM0253/PM0214 and Core registers and CMSIS intrinsic functions chapters.

JW

[waclawek.jan]

Posted on May 13, 2018 at 12:27

Run away from this company, and do not look back.

You are right, but with this approach you might find yourself mining coal pretty soon 😉

There are sins in every larger programming projects. You can chose to educate your colleagues but to do that you'll have to become an accepted expert within that company; and you can't do that by running away.

I've learned at least as much by trying to repair failed programs as by reading the good ones.

JW

[harry anders]

Posted on May 13, 2018 at 12:36

Thank you. That is exactly what I was looking for. You saved me from a great hassle.

[harry anders]

Posted on May 13, 2018 at 12:46

You are right...

but...

Here is the back story:

The firmware was originally written by inexperienced 3rd year bachelor students, 15 years ago on atmeg256 MCUs (the code grew like cancer and believe it or not after a few years 4 MCUs were stacked on top of each-other each holding a portion of the code). Code-wise It has many many problems... but it works! I have been tasked to completely rewrite the code and port it to STM32 MCUs. That I have already done and the new firmware works without any problems. I am now starting to remove the dirty stuff like the global interrupts being enabled and disabled periodically. I need to know the global interrupt state in specific sections of the code to be able to write new subroutines.

Hope that helps.

[AVI-crak]

Posted on May 13, 2018 at 13:13

This is not a solution, it is a reprieve before execution.

A normal solution is considered to be different levels of interrupt priorities, the transfer of bold program code from interrupts to the task area, and a competent prioritization of the tasks themselves.

Most likely your project requires a very fast response to external influences. In this case, the classical os crowding out is not suitable for you. You need streaming wasps, where there is no displacement of tasks. Each active task is certainly performed according to the general queue. The time of its active work is the analog of priority, and can have a value from 1% to 100% of the time interval selected for the standard (almost always 1ms). Under such conditions, the response to an external event can be less than 1 ms, and the processing of the event itself is instantaneous and unconditional.

https://community.st.com/external-link.jspa?url=https%3A%2F%2Fwww.segger.com

or my option

https://community.st.com/external-link.jspa?url=https%3A%2F%2Fbitbucket.org%2FAVI-crak%2Frtos-cortex-m3-gcc%2Fsrc%2Fdefault%2F

.

[harry anders]

Posted on May 13, 2018 at 13:25

I agree with you that it is not a solution but since it works, then it's good enough for the company.