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what is the difference between Transmission complete Interrupt(USART_CR1_TCIE) and TXE interrupt enable(USART_CR1_TXEIE) .

NITIN RAWAL
Associate II
Posted on April 11, 2018 at 11:01

My  code is run on STM32F427ZIxx

SET_BIT(huart2.Instance->CR1, USART_CR1_TXEIE);

void USART2_IRQHandler(void)

{

/* USER CODE BEGIN USART2_IRQn 0 */

/* USER CODE END USART2_IRQn 0 */

HAL_UART_IRQHandler(&huart2);

/* USER CODE BEGIN USART2_IRQn 1 */

HAL_UART_Transmit(&huart3,(uint8_t *)'\r\nTransmission Complete Interrupt',33,100);

}

when i am reading UART3 it is going infinite but CLEAR_BIT(huart2.Instance->CR1, USART_CR1_TXEIE); in ISR, giving two times print of.

vs  what is USART_CR1_TCIE  ????    

1 ACCEPTED SOLUTION

Accepted Solutions
AvaTar
Lead
Posted on April 11, 2018 at 12:31

TXE indicates the TX register is empty, and available again. The last value had just been moved to the send hardware.

The actual transmission might not yet have been started.

TC means the hardware has finished the transmission, the character has 'left' the device. This might take comparatively long.

void USART2_IRQHandler(void)

{

HAL_UART_Transmit(&huart3,(uint8_t *)'\r\nTransmission Complete Interrupt',33,100);

}

Not sure what the Cube generated code is based upon, but calling synchronous output functions (like printf()) from within an interrupt handler is a recipe for disaster.

View solution in original post

2 REPLIES 2
AvaTar
Lead
Posted on April 11, 2018 at 12:31

TXE indicates the TX register is empty, and available again. The last value had just been moved to the send hardware.

The actual transmission might not yet have been started.

TC means the hardware has finished the transmission, the character has 'left' the device. This might take comparatively long.

void USART2_IRQHandler(void)

{

HAL_UART_Transmit(&huart3,(uint8_t *)'\r\nTransmission Complete Interrupt',33,100);

}

Not sure what the Cube generated code is based upon, but calling synchronous output functions (like printf()) from within an interrupt handler is a recipe for disaster.

NITIN RAWAL
Associate II
Posted on April 12, 2018 at 06:35

thanks for valuable answer..