Using 2 device with FSMC?

Sandor Bedo · ‎2018-06-04

Posted on June 04, 2018 at 10:39

Hi,

Right now I am facing with the next issue:

I am using FSMC to drive an SDRAM (IS66WV51216) and an LCD (

https://shop.boxtec.ch/tft-lcd-shield-for-arduino-unomega-ili9481-p-42762.html?language=en

). As I use only the SDRAM without TFT, the write and read works fine, but as I connect the display the write/read operations have interesting issues.

As I write 1k data in to the SDRAM from 0-1023 and as I read back the numbers are strange (0 0 1 1 7 7 7 7 23 23 ...).

But as I use only the TFT with FSMC it also works fine.

I use the next settings:

NE1, NE2 -> PULL UP
DATA [0 - 16] -> PULL DOWN
ADDRES[0 - 18] -> NO RESISTOR
NWE -> PULL UP
NOE -> PULL UP
A25 -> this is connected to RS pin of TFT (data or command selector) NO RESISTOR

The data pins from 0-8 bits are common as the NWE and the NOE pins.

The data widths of the devices:

TFT => 8 bits
SDRAM => 16 bits

So separately both device work, but as I would like to use them in one SW it does not work.

I am using STM32F417ZET6 uC.

Have anybody any idea what should I set up to solve this problem?

#tft-and-sdram #sdram-fsmc #fsmc

Sandor Bedo · ‎2018-06-04

Posted on June 04, 2018 at 11:09

I forgot to attach the configs:

/* TFT configuration */

hsram1

.

Instance

=

FSMC_NORSRAM_DEVICE

;

hsram1

.

Extended

=

FSMC_NORSRAM_EXTENDED_DEVICE

;

/* hsram1.Init */

hsram1

.

Init

.

NSBank

=

FSMC_NORSRAM_BANK1

;

hsram1

.

Init

.

DataAddressMux

=

FSMC_DATA_ADDRESS_MUX_DISABLE

;

hsram1

.

Init

.

MemoryType

=

FSMC_MEMORY_TYPE_SRAM

;

hsram1

.

Init

.

MemoryDataWidth

=

FSMC_NORSRAM_MEM_BUS_WIDTH_8

;

hsram1

.

Init

.

BurstAccessMode

=

FSMC_BURST_ACCESS_MODE_DISABLE

;

hsram1

.

Init

.

WaitSignalPolarity

=

FSMC_WAIT_SIGNAL_POLARITY_LOW

;

hsram1

.

Init

.

WrapMode

=

FSMC_WRAP_MODE_DISABLE

;

hsram1

.

Init

.

WaitSignalActive

=

FSMC_WAIT_TIMING_BEFORE_WS

;

hsram1

.

Init

.

WriteOperation

=

FSMC_WRITE_OPERATION_ENABLE

;

hsram1

.

Init

.

WaitSignal

=

FSMC_WAIT_SIGNAL_DISABLE

;

hsram1

.

Init

.

ExtendedMode

=

FSMC_EXTENDED_MODE_DISABLE

;

hsram1

.

Init

.

AsynchronousWait

=

FSMC_ASYNCHRONOUS_WAIT_DISABLE

;

hsram1

.

Init

.

WriteBurst

=

FSMC_WRITE_BURST_DISABLE

;

hsram1

.

Init

.

PageSize

=

FSMC_PAGE_SIZE_NONE

;

/* Timing */

Timing

.

AddressSetupTime

=

2

;

Timing

.

AddressHoldTime

=

1

;

Timing

.

DataSetupTime

=

16

;

Timing

.

BusTurnAroundDuration

=

15

;

Timing

.

CLKDivision

=

16

;

Timing

.

DataLatency

=

17

;

Timing

.

AccessMode

=

FSMC_ACCESS_MODE_A

;

/* SDRAM configuration */

hsram2

.

Instance

=

FSMC_NORSRAM_DEVICE

;

hsram2

.

Extended

=

FSMC_NORSRAM_EXTENDED_DEVICE

;

/* hsram2.Init */

hsram2

.

Init

.

NSBank

=

FSMC_NORSRAM_BANK2

;

hsram2

.

Init

.

DataAddressMux

=

FSMC_DATA_ADDRESS_MUX_DISABLE

;

hsram2

.

Init

.

MemoryType

=

FSMC_MEMORY_TYPE_SRAM

;

hsram2

.

Init

.

MemoryDataWidth

=

FSMC_NORSRAM_MEM_BUS_WIDTH_16

;

hsram2

.

Init

.

BurstAccessMode

=

FSMC_BURST_ACCESS_MODE_DISABLE

;

hsram2

.

Init

.

WaitSignalPolarity

=

FSMC_WAIT_SIGNAL_POLARITY_LOW

;

hsram2

.

Init

.

WrapMode

=

FSMC_WRAP_MODE_DISABLE

;

hsram2

.

Init

.

WaitSignalActive

=

FSMC_WAIT_TIMING_BEFORE_WS

;

hsram2

.

Init

.

WriteOperation

=

FSMC_WRITE_OPERATION_ENABLE

;

hsram2

.

Init

.

WaitSignal

=

FSMC_WAIT_SIGNAL_DISABLE

;

hsram2

.

Init

.

ExtendedMode

=

FSMC_EXTENDED_MODE_DISABLE

;

hsram2

.

Init

.

AsynchronousWait

=

FSMC_ASYNCHRONOUS_WAIT_DISABLE

;

//FSMC_ASYNCHRONOUS_WAIT_ENABLE;

hsram2

.

Init

.

WriteBurst

=

FSMC_WRITE_BURST_DISABLE

;

hsram2

.

Init

.

PageSize

=

FSMC_PAGE_SIZE_NONE

;

/* Timing */

Timing

.

AddressSetupTime

=

15

;

Timing

.

AddressHoldTime

=

10

;

/* 1 */

Timing

.

DataSetupTime

=

200

;

/* 16 */

Timing

.

BusTurnAroundDuration

=

15

;

Timing

.

CLKDivision

=

16

;

Timing

.

DataLatency

=

17

;

Timing

.

AccessMode

=

FSMC_ACCESS_MODE_A

;