1 Reply Latest reply on Oct 12, 2017 5:26 PM by waclawek.jan

    RD pin (FSMC_NOE) required?

    mahir

      Hi
      There is no RD pin on the lcd.
      there are only WR, RS, CS and 16 bit data bus.
      RD pin (FSMC_NOE) required?
        Thank you.

       

      void LCD_CtrlLinesConfig(void)
      {
      GPIO_InitTypeDef GPIO_InitStructure;

      /* Enable GPIOD, GPIOE, GPIOF, GPIOG and AFIO clocks */
      RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD | RCC_AHB1Periph_GPIOE, ENABLE);

      /*-- GPIO Configuration ------------------------------------------------------*/
      /* SRAM Data lines, NOE and NWE configuration */
      GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_8 | GPIO_Pin_9 |
      GPIO_Pin_10 | GPIO_Pin_14 | GPIO_Pin_15 |
      GPIO_Pin_4 |GPIO_Pin_5;;
      GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
      GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; //GPIO_Pin_5 WR
      GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
      GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;

      GPIO_Init(GPIOD, &GPIO_InitStructure);

      GPIO_PinAFConfig(GPIOD, GPIO_PinSource0, GPIO_AF_FSMC);
      GPIO_PinAFConfig(GPIOD, GPIO_PinSource1, GPIO_AF_FSMC);
      //GPIO_PinAFConfig(GPIOD, GPIO_PinSource4, GPIO_AF_FSMC);
      GPIO_PinAFConfig(GPIOD, GPIO_PinSource5, GPIO_AF_FSMC);
      GPIO_PinAFConfig(GPIOD, GPIO_PinSource8, GPIO_AF_FSMC);
      GPIO_PinAFConfig(GPIOD, GPIO_PinSource9, GPIO_AF_FSMC);
      GPIO_PinAFConfig(GPIOD, GPIO_PinSource10, GPIO_AF_FSMC);
      GPIO_PinAFConfig(GPIOD, GPIO_PinSource14, GPIO_AF_FSMC);
      GPIO_PinAFConfig(GPIOD, GPIO_PinSource15, GPIO_AF_FSMC);

      GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 |
      GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 |
      GPIO_Pin_15;
      GPIO_Init(GPIOE, &GPIO_InitStructure);

      GPIO_PinAFConfig(GPIOE, GPIO_PinSource7 , GPIO_AF_FSMC);
      GPIO_PinAFConfig(GPIOE, GPIO_PinSource8 , GPIO_AF_FSMC);
      GPIO_PinAFConfig(GPIOE, GPIO_PinSource9 , GPIO_AF_FSMC);
      GPIO_PinAFConfig(GPIOE, GPIO_PinSource10 , GPIO_AF_FSMC);
      GPIO_PinAFConfig(GPIOE, GPIO_PinSource11 , GPIO_AF_FSMC);
      GPIO_PinAFConfig(GPIOE, GPIO_PinSource12 , GPIO_AF_FSMC);
      GPIO_PinAFConfig(GPIOE, GPIO_PinSource13 , GPIO_AF_FSMC);
      GPIO_PinAFConfig(GPIOE, GPIO_PinSource14 , GPIO_AF_FSMC);
      GPIO_PinAFConfig(GPIOE, GPIO_PinSource15 , GPIO_AF_FSMC);

      /* NE1 configuration */
      GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7;//CS
      GPIO_Init(GPIOD, &GPIO_InitStructure);
      GPIO_PinAFConfig(GPIOD, GPIO_PinSource7, GPIO_AF_FSMC);


      /* SRAM Address lines configuration */
      GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11;//RS
      GPIO_Init(GPIOD, &GPIO_InitStructure);
      GPIO_PinAFConfig(GPIOD, GPIO_PinSource11, GPIO_AF_FSMC);

      }

      /**
      * @brief Configures the Parallel interface (FSMC) for LCD(Parallel mode)
      * @param None
      * @retval None
      */
      void LCD_FSMCConfig(void)
      {
      FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure;
      FSMC_NORSRAMTimingInitTypeDef p;

      /* Enable FSMC clock */
      RCC_AHB3PeriphClockCmd(RCC_AHB3Periph_FSMC, ENABLE);
      RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG , ENABLE);

      /*-- FSMC Configuration ------------------------------------------------------*/
      /*----------------------- SRAM Bank 3 ----------------------------------------*/
      /* FSMC_Bank1_NORSRAM4 configuration */
      p.FSMC_AddressSetupTime = 0;
      p.FSMC_AddressHoldTime = 0;
      p.FSMC_DataSetupTime = 9;
      p.FSMC_BusTurnAroundDuration = 0;
      p.FSMC_CLKDivision = 1;
      p.FSMC_DataLatency = 0;
      p.FSMC_AccessMode = FSMC_AccessMode_A;
      /* Color LCD configuration ------------------------------------
      LCD configured as follow:
      - Data/Address MUX = Disable
      - Memory Type = SRAM
      - Data Width = 16bit
      - Write Operation = Enable
      - Extended Mode = Enable
      - Asynchronous Wait = Disable */

      FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM1;
      FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
      FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;
      FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
      FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
      FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;
      FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
      FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
      FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
      FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
      FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Enable;//
      FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Enable;//
      FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
      FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
      FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;

      FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure);

      /* Enable FSMC NOR/SRAM Bank3 */
      FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM1, ENABLE);
      }