FAQ: RTC M41T81S Handling of Oscillator Stop/Fail Bits

Document created by Central Support Employee on Jul 4, 2018
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I need some information to the RTC M41T81S.

  1. Clock register map: delivering/default values
  2. Handling of the ST - Oscillator Stop bit (Clock register: bit 7 of address 01h)
    >> writing: High-Low and then waiting 4 seconds before clearing OF - Oscillator Fail bit (Clock register: bit 2 of address 0Fh). Is this a must?




  1. Please refer to datasheet page 22, table 5 (https://www.st.com/resource/en/datasheet/m41t81s.pdf). There you will find default register settings.
  2. Technically, you can clear the OF bit without waiting 4 sec, but it can happen that system will set it again if the oscillator is not stable yet. Refer to AN3060 chapter 6.1 for more details (public on st.com, but also attached here)



(extracted from ST OLS Support Database)