S. Marsanne

Interrupt based state machine

Blog Post created by S. Marsanne Employee on Dec 31, 2016

One past challenge was to drive 3 SPI slaves sensors in parallel.


- A global signal to tell them when to "start measuring"

- Each slave notifies by EXTI interrupt when their data is ready to flow out

- Data was significant quantity (few kilobytes, not necessarily the same dats size for each slave)

- Sometime the strategy required for all sensors to wait for each other during the process.

- The sequence to launch a measurement and read out all data has to be nearly transparent to the user code


==> Use code would tell which pseudo sequence to run, launch it, do other things and either wait for a callback when complete, or read a complete flag updated by the interrupt based sequencer.


After some thinking and several itterations came up the concept of a pseudo state machine:


A typical MCU core has a program pointer, read the opcode, execute it and goes to the next one. Usually the core is running based on its internal clock.


The concept was to mimic an MCU core except that it takes one interrupt event to go to the next op-code and execute it.

The state machine is then interrupt based.


This implementation can be found in the attached source file.

Op codes can be created on demand, changed for each application.

Only one interrupt must be armed to trigger the next op code execution.

All interrupts must be same level to keep the system easy to manage and maintain.

To kickstart a sequencer, it must be called from the user code and mimic an interrupt = disable interrupts before calling the sequencer for the first time.


FTM is a composite state machines built from the 3 other individual state machines FT1, FT2 and FT3.


This was an interesting project as it emulates a hidden under the hood complex peripheral running in the background without RTOS, touches parallelism simple programming and scalability of the solution looked elegant and interesting.